Debounce filter setting should be independent from irq type setting
because according to the ACPI specs, there are separate arguments for
specifying debounce timeout and irq type in GpioIo and GpioInt.
This will fix broken touchpads for Lenovo Legion-5 AMD gaming laptops
including 15ARH05 (R7000) and R7000P whose BIOS set the debounce timeout
to 124.8ms which led to kernel receiving only ~7 HID reports per second.
Debounce filter setting should be independent from irq type setting
because according to the ACPI specs, there are separate arguments for
specifying debounce timeout and irq type in GpioIo and GpioInt.
This will fix broken touchpads for Lenovo Legion-5 AMD gaming laptops
including 15ARH05 (R7000) and R7000P whose BIOS set the debounce timeout
to 124.8ms which led to kernel receiving only ~7 HID reports per second.
Cc: Hans de Goede <email address hidden> /bugs.launchpad .net/ubuntu/ +source/ linux/+ bug/1887190 pinctrl/ pinctrl- amd.c | 7 -------
Cc: Andy Shevchenko <email address hidden>
Cc: <email address hidden>
BugLink: https:/
Message-Id: <email address hidden>
Signed-off-by: Coiby Xu <email address hidden>
---
drivers/
1 file changed, 7 deletions(-)
diff --git a/drivers/ pinctrl/ pinctrl- amd.c b/drivers/ pinctrl/ pinctrl- amd.c .5a1d518b563e 100644 pinctrl/ pinctrl- amd.c pinctrl/ pinctrl- amd.c irq_set_ type(struct irq_data *d, unsigned int type) TRIG_OFF) ; REMOVE_ GLITCH << DB_CNTRL_OFF; set_handler_ locked( d, handle_edge_irq);
index 524d55546b61.
--- a/drivers/
+++ b/drivers/
@@ -468,7 +468,6 @@ static int amd_gpio_
pin_reg &= ~BIT(LEVEL_
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
- pin_reg |= DB_TYPE_
irq_
break;
@@ -476,7 +475,6 @@ static int amd_gpio_ irq_set_ type(struct irq_data *d, unsigned int type) TRIG_OFF) ; REMOVE_ GLITCH << DB_CNTRL_OFF; set_handler_ locked( d, handle_edge_irq);
pin_reg &= ~BIT(LEVEL_
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
- pin_reg |= DB_TYPE_
irq_
break;
@@ -484,7 +482,6 @@ static int amd_gpio_ irq_set_ type(struct irq_data *d, unsigned int type) TRIG_OFF) ; REMOVE_ GLITCH << DB_CNTRL_OFF; set_handler_ locked( d, handle_edge_irq);
pin_reg &= ~BIT(LEVEL_
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
- pin_reg |= DB_TYPE_
irq_
break;
@@ -492,8 +489,6 @@ static int amd_gpio_ irq_set_ type(struct irq_data *d, unsigned int type) PRESERVE_ LOW_GLITCH << DB_CNTRL_OFF; set_handler_ locked( d, handle_level_irq);
pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
- pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
- pin_reg |= DB_TYPE_
irq_
break;
@@ -501,8 +496,6 @@ static int amd_gpio_ irq_set_ type(struct irq_data *d, unsigned int type) PRESERVE_ HIGH_GLITCH << DB_CNTRL_OFF; set_handler_ locked( d, handle_level_irq);
pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
- pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
- pin_reg |= DB_TYPE_
irq_
break;
--
2.28.0