Comment 22 for bug 273329

(In reply to comment #16)
> (In reply to comment #15)
> > Created an attachment (id=19691) [details] [details]
> > Patch
> >
> > Try this patch.
>
> This is already fixed in master. Though I realize now there's actually a bug in
> the fix there, "screen->chip_family & RADEON_CLASS_R100" will always be false -
> that should have been "(screen->chip_flags & RADEON_CLASS_MASK) ==
> RADEON_CLASS_R100" (I'll fix this). Anyway, it has the same effect on r300
> chips as your patch.
>

Hmm right I used a stale mesa tree.

Anyway, surfaces are not magic as you seem to imply. If you put one in front of a piece of memory, it applies the tiling function, whether the buffer is tiled or linear (in which case you scramble the contents). Here is what I think is the problem :
- the (low end) card doesn't tile the zbuffer
- we still setup the tile registers over the zbuffer
- reads are scrambled by the use of a surface. If the surface wasn't there, zbuffer reads would work