Traditionally, the zbuffer layout is different on low end/IGP variants (i.e. those that are TCL-less). That is the case for r100/r200 and that would be consistent with the fact that this bug is only seen on those chips, so I'd wager this geenralizes to r300 as well. Did anyone dig into that possibility ? Basically you'd just need to fix the span code in mesa.
Traditionally, the zbuffer layout is different on low end/IGP variants (i.e. those that are TCL-less). That is the case for r100/r200 and that would be consistent with the fact that this bug is only seen on those chips, so I'd wager this geenralizes to r300 as well. Did anyone dig into that possibility ? Basically you'd just need to fix the span code in mesa.