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  1. Bug #658307
  2. Comment #21

Comment 21 for bug 658307

Revision history for this message
Andy Whitcroft (apw) wrote :

Excellent news. This is fixed by the commit below, which is already in Natty:

  commit 7f74f8f28a2bd9db9404f7d364e2097a0c42cc12
  Author: Andreas Herrmann <email address hidden>
  Date: Thu Feb 24 15:53:46 2011 +0100

    x86 quirk: Fix polarity for IRQ0 pin2 override on SB800 systems

    On some SB800 systems polarity for IOAPIC pin2 is wrongly
    specified as low active by BIOS. This caused system hangs after
    resume from S3 when HPET was used in one-shot mode on such
    systems because a timer interrupt was missed (HPET signal is
    high active).

    For more details see:

      http://marc.info/?l=linux-kernel&m=129623757413868

    Tested-by: Manoj Iyer <email address hidden>
    Tested-by: Andre Przywara <email address hidden>
    Signed-off-by: Andreas Herrmann <email address hidden>
    Cc: Borislav Petkov <email address hidden>
    Cc: <email address hidden> # 37.x, 32.x
    LKML-Reference: <email address hidden>
    Signed-off-by: Ingo Molnar <email address hidden>