Comment 9 for bug 820746

a-r-karthick: thanks for your analysis.

This invalid register read seems something very similar which was also workarounded at r100_cp_init function, take a look at this change:

commit 9e5786bd14cb9ffe29ebe66d41cedf03311b0d30
Author: Dave Airlie <email address hidden>
Date: Wed Mar 31 13:38:56 2010 +1000

    drm/radeon/kms: add sanity check to wptr.

    If we resume in a bad way, we'll get 0xffffffff in wptr, and then
    oops with no console. This just adds a sanity check so that we can
    avoid the oops and hopefully get more details out of people's systems.

    Signed-off-by: Dave Airlie <email address hidden>

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 138ddd4..c8f4b03 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -744,6 +744,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
        udelay(10);
        rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
        rdev->cp.wptr = RREG32(RADEON_CP_RB_WPTR);
+ /* protect against crazy HW on resume */
+ rdev->cp.wptr &= rdev->cp.ptr_mask;
        /* Set cp mode to bus mastering & enable cp*/
        WREG32(RADEON_CP_CSQ_MODE,
               REG_SET(RADEON_INDIRECT2_START, indirect2_start) |

a-r-karthick: Can you raise this issue upstream, at <email address hidden> mailing list? You can just test and send a similar patch for review, using ptr_mask also.