I found my mistake, I dumb-thumbed the last bisection.
The patch that's implicated now makes much more sense, and it;s even specific to the model listed in the bug.
I'll build again with that reverted and have it for testing
Here's the offending patch:
From fa7e0b5ba8551654a6887c5b1678c713c0e9c973 Mon Sep 17 00:00:00 2001 From: Alex Deucher <email address hidden> Date: Mon, 18 Oct 2010 23:54:56 -0400 Subject: [PATCH] drm/radeon/kms: properly compute group_size on 6xx/7xx
BugLink: http://bugs.launchpad.net/bugs/690730
commit 881fe6c1d06bf49f4ab7aef212cdaf66bd059614 upstream.
Needed for tiled surfaces.
Signed-off-by: Alex Deucher <email address hidden> Signed-off-by: Dave Airlie <email address hidden> Signed-off-by: Greg Kroah-Hartman <email address hidden> Signed-off-by: Andi Kleen <email address hidden> Signed-off-by: Brad Figg <email address hidden> --- drivers/gpu/drm/radeon/r600.c | 7 +++++-- drivers/gpu/drm/radeon/rv770.c | 9 +++++---- 2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index eddeff3..a40be95 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -1592,8 +1592,11 @@ void r600_gpu_init(struct radeon_device *rdev) rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; rdev->config.r600.tiling_nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); tiling_config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); - tiling_config |= GROUP_SIZE(0); - rdev->config.r600.tiling_group_size = 256; + tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); + if ((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) + rdev->config.r600.tiling_group_size = 512; + else + rdev->config.r600.tiling_group_size = 256; tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT; if (tmp > 3) { tiling_config |= ROW_TILING(3);
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 67e8073..082c380 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -627,10 +627,11 @@ static void rv770_gpu_init(struct radeon_device *rdev) else gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3); - - gb_tiling_config |= GROUP_SIZE(0); - rdev->config.rv770.tiling_group_size = 256; - + gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); + if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) + rdev->config.rv770.tiling_group_size = 512; + else + rdev->config.rv770.tiling_group_size = 256; if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { gb_tiling_config |= ROW_TILING(3); gb_tiling_config |= SAMPLE_SPLIT(3); -- 1.7.0.4
I found my mistake, I dumb-thumbed the last bisection.
The patch that's implicated now makes much more sense, and it;s even specific to the model listed in the bug.
I'll build again with that reverted and have it for testing
Here's the offending patch:
From fa7e0b5ba855165 4a6887c5b1678c7 13c0e9c973 Mon Sep 17 00:00:00 2001
From: Alex Deucher <email address hidden>
Date: Mon, 18 Oct 2010 23:54:56 -0400
Subject: [PATCH] drm/radeon/kms: properly compute group_size on 6xx/7xx
BugLink: http:// bugs.launchpad. net/bugs/ 690730
commit 881fe6c1d06bf49 f4ab7aef212cdaf 66bd059614 upstream.
Needed for tiled surfaces.
Signed-off-by: Alex Deucher <email address hidden> gpu/drm/ radeon/ r600.c | 7 +++++-- gpu/drm/ radeon/ rv770.c | 9 +++++----
Signed-off-by: Dave Airlie <email address hidden>
Signed-off-by: Greg Kroah-Hartman <email address hidden>
Signed-off-by: Andi Kleen <email address hidden>
Signed-off-by: Brad Figg <email address hidden>
---
drivers/
drivers/
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/ gpu/drm/ radeon/ r600.c b/drivers/ gpu/drm/ radeon/ r600.c gpu/drm/ radeon/ r600.c gpu/drm/ radeon/ r600.c init(struct radeon_device *rdev)
rdev-> config. r600.tiling_ npipes = rdev->config. r600.max_ tile_pipes;
rdev-> config. r600.tiling_ nbanks = 4 << ((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
tiling_ config |= BANK_TILING((ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); r600.tiling_ group_size = 256; r600.tiling_ group_size = 512; r600.tiling_ group_size = 256;
tiling_ config |= ROW_TILING(3);
index eddeff3..a40be95 100644
--- a/drivers/
+++ b/drivers/
@@ -1592,8 +1592,11 @@ void r600_gpu_
- tiling_config |= GROUP_SIZE(0);
- rdev->config.
+ tiling_config |= GROUP_SIZE((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
+ if ((ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
+ rdev->config.
+ else
+ rdev->config.
tmp = (ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT;
if (tmp > 3) {
diff --git a/drivers/ gpu/drm/ radeon/ rv770.c b/drivers/ gpu/drm/ radeon/ rv770.c gpu/drm/ radeon/ rv770.c gpu/drm/ radeon/ rv770.c init(struct radeon_device *rdev)
gb_tiling_ config |= BANK_TILING( (mc_arb_ ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
rdev-> config. rv770.tiling_ nbanks = 4 << ((gb_tiling_config >> 4) & 0x3); rv770.tiling_ group_size = 256; (mc_arb_ ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); rv770.tiling_ group_size = 512; rv770.tiling_ group_size = 256;
gb_tiling_ config |= ROW_TILING(3);
gb_tiling_ config |= SAMPLE_SPLIT(3);
index 67e8073..082c380 100644
--- a/drivers/
+++ b/drivers/
@@ -627,10 +627,11 @@ static void rv770_gpu_
else
-
- gb_tiling_config |= GROUP_SIZE(0);
- rdev->config.
-
+ gb_tiling_config |= GROUP_SIZE(
+ if ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT)
+ rdev->config.
+ else
+ rdev->config.
if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
--
1.7.0.4